PRESENTATION

Scaling Co-packaged Optics Requires a Fundamental Rethink of Fibre-to-chip Interconnects

Today’s leading CPO interconnect approaches rely on complex micro-optics and precision assembly, creating performance ceilings, manufacturing bottlenecks, and fragile supply chains that fundamentally limit scale. As AI systems push toward ever-higher bandwidth density, insertion loss and packagability at the fibre–chip interface are becoming the dominant constraints. In this talk, we present our latest results on UPIc (Universal Photonic InterConnect) — a passive, detachable fibre-to-chip interconnect based solely on standard fibre and standard PIC processing. UPIc achieves ultra-low insertion loss (~450 mdB) with large alignment tolerance (>60 µm) and supports repeated plug-and-unplug operation, enabling scalable, high-yield manufacturing flows for co-packaged optics. We will discuss recent performance results, manufacturability considerations, and why our solution is essential for scaling CPO to high-volume deployment.