Presentation at PIC International 2022 are grouped into 4 key themes which collectively provide complete coverage of the global photonics industry.
If you are interested in speaking at PIC International 2022, please contact info@picinternational.net or call +44 (0)2476 718 970.
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We will present a photonic integration technology on silicon for producing Augmented Silicon Photonic Integrated Circuits with integrated lasers and/or SOAs. This is realized by bonding unprocessed III-V dices to the backside of Silicon photonic wafers, and post-processing the dices to form the lasers at wafer level. Unlike existing heterogeneous III-V/Si technologies, it relies on standard Silicon photonic processes available from commercial fabs. The latter now offer doped silicon, germanium and silicon nitride waveguides to accommodate best in class modulators, photodetectors and filters respectively. Combined with backside integrated lasers, the technology enables the fabrication of fully integrated photonic circuits at 1310nm or 1550nm, with unprecedented characteristics for optical communications and 3D sensing. A few examples of integrated circuits will be presented, highlighting the benefits of the integration of III-V/Si at the wafer level.
We will introduce the use of Optiwave's simulation tools together with standard EDA software. It allows chip designers to get their design right the first time, saving them valuable time and effort. Below are the main points. • Modeling and simulation in a design environment are essential for the optoelectronic integrated circuit manufacturing process. • Methods for generating optoelectronic compact models for PDK's using experimental data as well as simulation results will be shown. • Different methods of adding optical simulation capabilities into SPICE engines will be compared. Direct integration of optical models into SPICE engines through standard device modeling API's will be discussed. • An example implementation of photonic model integration into Siemens EDA will be shown. This integration includes the capability of running simulations from photonic circuit schematics or mask layouts. • Research into advanced device modeling capabilities using neural networks will be demonstrated.
Photonic engineers face the challenge of effectively utilizing the various software tools needed to accomplish specific design and simulation studies. We demonstrate the application of photonic foundry PDK building blocks to model specific components within an entire optical system. We show how to realize a complete optical system simulation as a functional block to electronic design automation tools for full end-to-end link simulation. We discuss a comprehensive workflow that integrates design and simulation techniques ranging from optical waveguides and fibers to complete optical communication systems and offers interoperation with 3rd party software solutions.
The presentation from Yole provides market data on silicon photonics dies, SOI wafers, and transceivers and describes the novel silicon photonics applications in consumer, automotive, and computing. It also presents a complete analysis of the silicon photonics market up to 2027 with revenues, volumes by applications and technologies. Consolidation of the supply chain and market shares of the different players are discussed. New technological approaches (CPO, new materials) are analyzed.
Photonic integrated circuits (PIC) are enabling a variety of applications in data/telecom, sensing, lidar, AI, Quantum Computing. For all these applications, one common challenge is to design and validate photonic IP blocks such as AWGs, MZM, 90 degree optical hybrids and MZI lattices. These building blocks are then used to build PICs. In this presentation we will talk about the challenges that design teams may encounter when it comes to designing validated IP blocks, starting from our own experience supporting customers and building our own synthesis toolbox for creating parametric AWGs.
The many advantages of integrated photonic circuits are driving the industry forward in several photonics endeavors. For example, the next generation of transceivers—featuring hybrid integrated photonics—is currently setting new transmission records at reduced energy consumption. To successfully mass produce these key components in a context of rising requirements and demand, testing and characterization need to be fast, flexible, integrated and repeatedly reliable. Leveraging joint expertise from the industry, PIC measurement can now be optimized within a turnkey solution that carries out several tasks efficiently and with easy reconfiguration. Join me as I highlight such scalable and integrated test solutions, from EXFO and its industry partners, for optical spectrum and traffic analysis. I will also demonstrate how simple it is to shift to faster characterization without any compromise on performance!
We will present the latest electronic-photonic design automation (EPDA) solutions jointly developed by Ansys Lumerical and Cadence. We will use a silicon photonic ring-based wavelength division multiplexing (WDM) system to demonstrate the overall design flow that covers custom component design, compact model creation, circuit simulation, layout implementation, and electronic-photonic co-design.
Hyperscale data center operators are driving unprecedented growth in data communication speeds. As these required increases in bandwidth outpace the ability of serial channels to respond, the industry has turned to parallelism and wavelength division multiplexing to achieve greater aggregate bandwidths. This in turn has driven the complexity of optical links higher and beyond what can be accommodated with discrete optical components. Photonic Integrated Circuits are no longer a research topic, but are now a must have to meet future Datacom requirements. In this presentation, I will look at where PICs will fit into Datacom roadmaps and how they compare to alternatives. I will compare PIC options, list pros and cons, and give some real world example of PIC successes. I will conclude with recommendations on how PIC suppliers can capture more of the lucrative Datacom market.
We live in a world where consumers and businesses have demonstrated an insatiable appetite for data and more advanced devices. As demand increases, networks and devices are incorporating more integrated optical components and the process capabilities and scale of the integrated circuit foundries is becoming a differentiator. This presentation will look at data traffic forecasts and application segmentation to understand the opportunities and the market trajectory. We will also discuss the trends and drivers in the silicon and compound semiconductor foundry ecosystems that will figure prominently in the emerging PIC supply chain.
The rapidly growing demand in optical connectivity to enable high-speed data transfers in data centers, telecom networks, sensors and emerging applications in advanced computing for artificial intelligence (AI) requires innovative and more efficient photonic packaging solutions. This is driving the importance of developing standard semiconductor manufacturing processes in silicon photonics, to enable simple and reliable interface connections of silicon photonics chips to optical fibers. Consequently wafer-level nanoimprint lithography (NIL) has come into industry focus as manufacturing technology of choice. It provides an innovative synergy between micro optics and silicon photonics manufacturing. In this talk we will show, how NIL and wafer level optics help solve this key challenge of connecting fibers to silicon chips and allowing cost-efficient wafer level packaging.
The yield limitation in the fabrication of arrayed waveguide gratings is relating to imaging errors of the dispersive element, i.e. the arrayed waveguides with a constant length increment. Due to process variation the length of the arrayed waveguides can vary from the design intend. A linear error results in a shifted wavelength response. A parabolic error is called defocus and results in rounding and widening of the passband. A third order error, or so called coma, results in asymmetry in the passband. It is discussed how these errors can be measured and corrected in production during lithography or after production using trimming techniques.
Silicon-on-insulator (SOI) substrate technology has been the defining foundation of silicon photonics integrated circuits over the last 20+ years, fostering its commercial deployment in the datacenter by promoting widespread adoption of high-speed optical transceiver products. By first providing an overview of market trends driving silicon photonics application space recent expansion from datacenter interconnects into sensing devices and computing technologies, the talk will then focus on the technological advances in the Photonics-SOI Smart-Cut process. Specifically, these are benchmarked on silicon photonics multi-project wafer (MPW) process runs, where an extensive set of optical devices and circuits are fabricated, with optical characterization data and device performance supporting the ultimate choice of substrate technology for silicon photonics on thin-SOI platforms.
In this talk, we present crosstalk-free 32-ch WDM demultiplexer realized on standard Si PIC platform for the first time. Compatibility with the vast component libraries of standard Si PIC platform provides a path to ultrahigh-capacity integrated DWDM transceivers.
The issue of reducing power consumption in datacenters, and optical networks has become a huge topic of discussion at major optical communication conferences, and industry in general. High speed, low power modulators are seen to be an enabling technology that can help mitigate power consumption in transceivers, line cards, servers, and routers. Electro-optic polymer modulators are now poised to address power consumption with their inherent high speed and very low power properties. Electro-optic polymers are now additive with silicon foundries to integrated photonics platforms such as silicon photonics to increase performance significantly. The latest performance of polymer modulators is extremely exciting with 3dB bandwidths over 100GHz with very low voltages and extremely small footprints (ideal for pluggable transceivers). This talk will also review the latest work in photonics industry roadmaps on both the integrated photonics (PIC) level as well as PIC packaging level.
Dr. Suresh Venkatesan will present a unique hybrid integration platform for wafer scale passive assembly of electronics and photonics devices using a CMOS based optical interposer. The POET Optical Interposer enables seamless communications between electronics and photonics chips that are assembled on standard 200 or 300mm silicon wafers using visually assisted passive flip chip bonding techniques. This unique integration platform is the first such platform in the industry adapted to directly modulated lasers and enables the world’s smallest single chip Transmit/Receive Optical engine for 100G-400G optical engines.
Silicon Photonic has become an enabling technology for many different areas allowing miniaturized sensors, fast optical chips (instead of electrical) and improved performance in general. A wide rang of applications such as LIDAR, Telecom Transceiver, Data Center Switches, Quantum and Optical Computing, Medical Sensors ,etc. are already using Silicon Photonics (SiP)in the form of Photonics Integrated Circuits (PIC). They are though mostly still at low to medium volume as SiP requires an additional laser chipset to be included in the PIC. This means often time consuming active alignment of laser, micro optics and fibers to the PIC or complex micro optical set ups. The packaging of the PIC is still not at the same level as for electronics. We will present in this talk Aligned 2 Photon Lithography (A2PL), a new 3D printing process based on two photon polymerization, to reduce alignment tolerances, enabling passive pick and place and bringing freeform optics to the PIC community. The latter allows to reduce coupling losses or enables even higher miniaturization. We will show examples for printing on fibers for coupling to or from different Mode Field Diameters (MFD) and High Precision Printing of Free Space Micro Optics (FSMO) on the edge of chips. Two principles of high precision alignment are used and will be explained. They enable alignment with a precision down to 100nm.
In this talk we will present Aligned 2 Photon Lithography (A2PL), a new 3D printing process based on two photon polymerization, to reduce alignment tolerances, enabling passive pick and place and bringing freeform optics to the PIC community. The latter allows to reduce coupling losses or enables even higher miniaturization. We will show examples for printing on fibers for coupling to or from different Mode Field Diameters (MFD) and High Precision Printing of Free Space Micro Optics (FSMO) on the edge of chips. Two principles of high precision alignment are used and will be explained. They enable alignment with a precision down to 100nm.
We will present the LIGENTEC offering for low loss silicon nitride PICs for application such as quantum, LiDAR and sensing. Options of active integration, such as LNOI are discussed. The offering includes fast R&D cycles in low volume PIC fabrication though multi-project wafer runs to high volume PIC fabrication in an automotive qualified CMOS line.
Lithium niobate on insulator (LNOI) is one of the most promising emerging platforms for photonics integrated circuits (PICs) that comprises a unique set of interesting optical properties such as: a high electro-optic coefficient, high intrinsic 2nd and 3rd order nonlinearities, and a large transparency window (350nm - 5500nm). Recent advancements in bonding of single crystal thin films of lithium niobate onto silicon substrates (LNOI), has opens a new avenue to explore the advantages of lithium niobate in the context of PICs and to benefit from their miniaturization, cost reduction, scalable manufacturing, and integration. This ultimately enables designing complex PICs with tens of components in a millimeters-size chip benefiting a wide range of applications including quantum technologies, telecom, LiDAR and sensing. However, so far, LNOI technology has been limited to few academic groups around the world. This is mainly because currently there are no PIC foundry that offers LNOI technology as standard platform to the industry. Establishing a reliable, high yield fabrication process for LNOI PICs is the key to ensure wide spread of this novel technology. CSEM is set to establish an open PIC foundry based on LNOI platform based on a well-tested process design kit (PDK) library. Here, we present our first results toward this goal and demonstrate a high-yield 150mm wafer scale fabrication technology for low-loss LNOI waveguides at two wavelengths: 1550nm and 780nm that demonstrate losses
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Zero Point Motion is working with CORNERSTONE (University of Southampton and Glasgow University), to create low noise chipscale optical inertial sensor prototypes by combining photonic integrated circuit (PIC) structures with micro-electro-mechanical systems (MEMS) engineering. Our technology is derived from research exploring the coupling between optical resonances and mechanical motion, already shown to produce 1000x lower noise floors compared with capacitive devices. We therefore exploit this cavity optomechanical interaction using a platform comprising ring resonators containing whispering gallery mode resonances, coupled to the motion of MEMS inertial test-masses placed within resonator evanescent field. We report on progress in realising an integrated device, with both MEMS and PIC structures packaged with light sources and detectors on-chip.
The success of PICs in both high tech and consumer applications relies on ever increasing integration of functionality. To this end, LioniX International champions a powerful methodology – hybrid integration – bringing active components to its low loss silicon nitride platform for best-of-both worlds performance. In this update, CEO Arne Leinse presents advances in hybrid integration methods that yield developments in tunable lasers and LioniX International’s RGB laser engine for Augmented Reality headsets.
The development of highly-coherent laser sources through the hybrid integration of III-V gain media and passive silicon photonic low-loss cavities has disparaged the notion that the poor light emission properties of the silicon material will hinder the viability of CMOS-compatible silicon photonics as a photonic platform. Our work in hybrid III-V/silicon lasers have resulted in demonstrated performance metrics (i.e., side-mode suppression ratio, wavelength-tuning, linewidth, relative intensity noise) that would be difficult to achieve amongst solitary III-V lasers. These lasers are expected to play a key role in enabling current and emerging applications such as high-bandwidth optical communications, coherent LIDAR and optical sensing.
Photonic and plasmonic sensing may collectively address unmet medical diagnostic needs when implemented in the context of integrated optics. On one side, Photonic integrated circuits (PIC) technology allows the integration of multiple optical components onto the same substrate, enabling fast measurement, multi-functionality, miniaturization, and scalability. On the other side, plasmonic sensors can boost the specifications of diagnostic solutions like sensitivity (strong light-analyte interaction) and small sample volume requirements (ultra-small sensing area). Bringing the best of those worlds onto a CMOS- compatible PIC platform can meet those goals while offering lower production cost and high-volume manufacturing of disposable chips. We will present Bialoom’s unique silicon-plasmophotonic biosensing technology that enables monolithic co-integration of CMOS-compatible Mach Zehnder interferometers with plasmonic transducers into robust, stable and flexible biosensor PICs. We will review the capabilities of this technology and we will present the progress towards the development of a powerful plasmo-photonic diagnostic biochip towards immediate diagnosis of acute infections.
The market of high-speed transceivers has enjoyed significant growth over the past decade due to their application both in and between data centers. This presentation addresses the development of future generations of such transceivers, from the viewpoint of not only the photonic integrated circuits and the underlying processes, but also the subsequent analog electronics and high-speed analog-to-digital and digital-to-analog converters. Next-generation transceivers will operate at baudrates as high as 100 to 130Gbaud, with rates far beyond this already on the horizon. The integration between these different constituent parts is critical to achieve high performance: novel integration techniques and their underlying process are addressed.
As evident from the recent standardization activities, the I/O interconnects in hyperscale data centers and high-performance computing infrastructure are in a major architectural overhaul. The business imperatives of boosting energy and spectral efficiencies while continuing to push for reduced foot-print make co-packaged optics a more near-term necessity than thought just a couple of years ago. The success of rapid development and subsequent deployment of new interconnect designs hinges on (i) photonic integration, (ii) customization of IP in the optical module, and (iii) simulation to ensure end-to-end electrical-optical-electrical interoperability. In our view, the time is now for the photonic designers to consider all of these three aspects holistically in the product development cycle. In this presentation, we demonstrate a Synopsys design flow for the E-O-E co-design using customizable IP.
Dynamic environment of technology, Covid situation pushed few high-tech related topics to their limits, health, digitalization and security. In this talk, will be summarize how&why integrated photonic plays an important role in these segments and will share our recent progress with respect to 200/300mm CMOS technologies.
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In this presentation, we will discuss the opportunities for PICs in terms of applications in communication, sensing and computing domains in the next ten years. The first type of application concerns data transmission at different scales: telecom, datacom and computercom. Other applications relate to High Performance Computing with Quantum PIC (QPIC) and potential Optical Processing Units (OPU). The sensing domain offers very important opportunities in many end-user markets such as automotive and transportation (LIDARs), healthcare (bio-sensing, implantable microdevice, monitoring of biomarkers …), aerospace (remote and fiber-based sensing) as well as agri-food and environment.
We present memristor integrated microring modulators and lasers with non-volatile memory on a silicon photonic platform. III-V and Si substrates are bonded together and sandwich a thin oxide layer which forms a memristor. By changing the state of the memristor, the operating wavelength of microring lasers and modulators can be tuned in a non-volatile fashion. In this unique platform, we can integrate configurable, linear synaptic weights in the form of the resistance levels of memristors directly on the same chip as non-linear active optoelectronic devices, such as III-V lasers and modulators, to produce an integrated photonic neuron.
Hybrid photonic integration enables the realization of complex PICs with an optimal combination of materials to realize the various photonic functionalities. Fraunhofer HHI’s hybrid integration platform PolyBoard allows for the combination of passive polymer waveguides, micro-optical benches and active semiconductor elements. The transparency from the visible to the infrared enables tunable lasers, highly efficient filters as well as on-chip nonlinear and nonreciprocal optics across this broad spectrum. In combination with other functionalities of the platform, complex PIC for various application fields, including communications, sensing and especially quantum technologies, were realized and will be presented in the talk.
As one of the applications driving the commercialization of photonic integrated circuit(PIC), there have been growing interests in LiDAR, so called the eye of autonomous driving. In the last PIC conference, we presented the research-level efforts to move from platform to PIC as the first step towards chip-scale LiDAR. In this conference, we would like to present the research-level progress from PIC to module as the second step towards chip-scale LiDAR. The status of early-stage autonomous driving field test with the LiDAR module will be addressed as well.
Photonic integrated circuit (PIC) technology is particularly attractive for space applications for its ability to drastically reduce photonic system cost, size, weight and power (CSWaP). In addition to improving performance and reliability, PICs could enable deployment on small space platforms that leverage lower cost payloads. This presentation will summarize PIC technology developed for space Lidar systems for remote gas sensing and topographical mapping.
Analog signal processing in integrated optic technology offers exciting prospects to enhance the performance and efficiency of neural network inference and training. The motivation for photonic implementations of neuromorphic hardware will be discussed, examples will be presented and benchmarked against state-of-the-art digital technology.
Photonics is the technology associated to high speed communications, owing to the lowest transmission losses of optical fiber over a virtually infinite bandwidth. This advantage has been realized so far through multiplexing a large number of narrow bandwidth channels. Currently, there are two trends that are challenging this model: (a) the bandwidth of baseband signals is increasing to the limits of the RF interfaces of photonic components, and (b) photonic technologies are spearheading the access to the millimeter and Terahertz wave range. This talk aims to discuss novel approaches to interface photonics with high frequency signals.
Global geopolitical context and subsequent European ambitions towards strategic autonomy in KET brings photonics-enabled technologies high on the agenda. In this talk, we will summarize the significance of the Dutch industrialization strategy in the light of the recent developments within PhotonDelta ecosystem. Most importantly, we will highlight how and why a truly Pan-European strategy for PICs is critical in immediate sense, as well as share our vision towards creating one.
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