There are only 4 delegate places remaining for 2024! Sell-out is guaranteed!


Two days, 7 themes, over 30 inspiring presentations

Presentations at PIC International 2024 are grouped into 7 key themes which collectively provide complete coverage of the photonic integrated circuits industry.

If you are interested in speaking at PIC International 2024, please contact or call +44 (0)24 7671 8970.

2024 Speakers Include

AIM Photonics
ALUVIA Photonics
Ansys Optics
APEX Technologies
Bright Photonics
Broadex Technologies
EV Group
Helbling Technik Bern AG
Hewlett Packard Enterprise
Keysight Technologies
Lightwave Logic Inc
Luceda Photonics
Luna Innovations
Physik Instrumente
POET Technologies
SCINTIL Photonics
Tyndall National Institute
UCSB (University of California Santa Barbara)
Vanguard Automation
Vector Photonics
VIAVI Solutions
Yole Group
Zero Point Motion

2024 Presentation Abstracts

Hybrid PICs: Pioneering New Frontiers in Photonic Integration
This theme is sponsored by OPTICA

Advanced Photonic Integrated Circuit Testing: APEX Technologies’ solution for High Precision Optical Instrumentation

Presented by Tomy Marest, Technical R&D project manager, APEX Technologies

The growing market of Photonic Integrated Circuits (PICs) poses new challenges for testing and characterization of ever more complex circuits both in the context of R&D and production. APEX Technologies offers high performance optical instruments based on interferometry technology to address those. We will see how its best-in class High Resolution Optical Spectrum Analyzer with component analysis and polarimeter capability along with its new Optical Frequency-Domain Reflectometer with highest dynamic-range in the market are used at the world-class Photonic Integration Technology Center (PITC).

Advancements in Optically Enhanced MEMS Inertial Sensors: Prototyping and Roadmap Challenges for Consumer Markets

Presented by Lia Li, CEO, Zero Point Motion

Zero Point Motion is pioneering advancements in optically enhanced MEMS inertial sensors, leveraging cutting-edge silicon photonics technology to improve accelerometer and vibratory gyroscope sensitivities by 100-1000x. Through rigorous development efforts, we've successfully crafted and field-tested prototypes, marking a significant milestone in sensor technology. However, defining our product roadmap to eventually satisfy consumer product requirements remains a pivotal challenge in breaking into the $16Bn inertial sensor market. This talk highlights our journey's progress and underscores the obstacles we will encounter for our sensor technology to be adopted for widespread use within IoT, automotive and smartphone markets, including reducing sensor cost to

Advances in hybrid Silica-Nitride waveguides

Presented by Henk Bulthuis, R&D Director, Broadex Technologies

In this presentation we will share the latest results on test and design of products that combine a hybrid of two waveguide technologies in one PLC. The Silica waveguide provides good coupling to fiber. In Silica we have developed cascade AWG chips with a filter function that has box-shape with low loss of less than 2dB and good isolation. In Nitride we can achieve small bend radius to minimize the chip size. Nitride also allows for smaller modes that are better suited to couple directly to laser diode and Silicon photonics with low coupling loss.

Augmented Silicon Photonics for demanding Data Center and AI/ML network fabrics

Presented by Yannick Paillard, Chief Commercial Officer at SCINTIL Photonics, SCINTIL Photonics

The computing and data needs of AI are growing exponentially, even faster than core semiconductor technologies. Parallelism is necessary to address this challenge with optical interconnects penetrating deeper into data centers and HPC clusters to enable higher data throughput and lower power consumption. Although silicon photonics can provide the densest and most cost-effective solution, it cannot integrate lasers. During the presentation, I will describe SCINTIL's technology for heterogeneous integration of III-V materials, leveraging foundry standard silicon photonics, to deliver PICs with integrated lasers and SOA. I'll finish with the benefits of our PIC solutions to support terabit capacities with pluggable or co-packaged optics.

BTO-powered PICs for communication and switching

Presented by Cyriel Minkenberg, Product Line Manager for transceiver chips, Lumiphase

Controlling light with electrical signals is a critical function in photonic integrated circuits for optical communication, sensors, and switches. Lumiphase develops and manufactures photonic chips based on a unique BTO Pockels technology. The superior materials performances translate into electro-optical modulation functionalities with benefits in cost, speed, transparency, power-consumption, and footprint compared to standard silicon solutions. The Pockels-enhanced chips enable next-generation transceivers, both for coherent as well as direct-detect data transmission schemes, as well as for a wide range of photonic applications ranging such as sensing, data processing, or switching, where large numbers of ultra-efficient, integrated phase shifters are needed.

Designing high power hybrid integrated tuneable lasers for automotive LiDAR

Presented by Ruud Oldenbeuving, R&D Manager Photonic Systems, imec

Currently, in systems using photonic integrated circuits (PIC), not many integrated options for lasers on-chip are available. So generally, off-chip devices (pig-tailed lasers, etc) or underperforming on-chip devices are used. From both price and performance point of view, this is an undesirable situation. Especially, for automotive-grade solid-state FMCW LiDAR systems, the elephant in the room is generally ignored; the optical output power generated by the laser is too low, and/or the mode-hop free tuning is too little and too slow. In this presentation, we will show designs that offer a customized laser suitable for FMCW LiDAR, with powers only limited by nonlinear effects in the PIC platform, wavelength tuning ranges of over 100 nm and laser linewidths and chirp ranges appropriate to that of a distance measurement of 300 m (source to target). Our current hybrid integration solution is targeted at c-band, but the approach is valid for all wavelengths for which the PIC platform is transparent.

Heterogeneous Integration of Photonic Devices on Silicon

Presented by Jonathan Klamkin, Professor of Electrical and Computer Engineering and Director of UCSB Nanofab, UCSB (University of California Santa Barbara)

Heterogeneous integration of compound semiconductors devices on silicon provides a path to adding high-performance active components to silicon photonics platforms. Approaches to this integration include direct heteroepitaxy on silicon and micro transfer printing. Leveraging metalorganic chemical vapor deposition for direct heteroepitaxy enables process integration by selective area growth. Active components demonstrated include quantum dot lasers and semiconductor optical amplifiers, traveling wave modulators, and uni-traveling-carrier photodiodes.

Heterogeneous integration to capitalize on upcoming markets, the new IPSR-I global roadmap update

Presented by Peter van Arkel, CTO, PhotonDelta

The Integrated Photonics Systems Roadmap – International (IPSR-I) is a collaboration of over 400 participants from all over the world. The participants come from industry, research organizations and academia. The IPSR-I shows the consensus of technology gaps for PICs in the next 5 – 20 years per technology and application field. The four markets that are predicted to drive PIC manufacturing for the next 20 years in the IPSR-I are: Datacom, 3D imaging, (bio)sensing and RF-photonics. The industry trends towards integration of chips from different material platforms into one package, to leverage all the advantages of each electronic/photonic platform. The IPSR-I gives insight in the key challenges of the future for integration of these platforms to achieve volume manufacturing of PICs in the driving markets.

High speed, low power, tiny modulators in a polymer PIC platform are poised to enable 800G/1.6Tbps data communications, driven in part by artificial intelligence.

Presented by Michael Lebby, CEO, Lightwave Logic Inc

The issue of reducing power consumption, increasing information in optical networks in a datacenter rich environment has become a huge topic of discussion at major optical communication conferences, and industry in general. Ultra-high speed, ultra-low power modulators, ultra-small foundry-based polymer modulators are seen to be an enabling technology that can help mitigate power consumption in transceivers, line cards, servers, and routers. This is especially the case where the appetite for artificial intelligence, machine learning is driving huge investments for higher performance datacenter equipment/cap ex. Electro-optic polymer modulators are now poised to address power consumption with their inherent ultra-high speed and very low power properties (>70GHz EO S21 3dB bandwidths, and sub 1V drive voltages). Electro-optic polymers are now additive with silicon foundries to integrated photonics platforms such as silicon photonics to increase performance significantly. The latest performance of polymer modulators will be reported that aligns very well with 800G and 1.6Tbps transceiver technology. This talk will also review the latest work in photonics industry decade roadmaps (that look out to 2030-2040) on both the integrated photonics (PIC) level for hybrid PICs, as well as PIC packaging level for the various technologies to package hybrid PICs.

Photonic Integrated Circuits: Surface Coupling Lasers using InP as an integration platform

Presented by Bill Ring, Chief Product Officer, Vector Photonics

Surface emitting lasers at 1300nm and 1550nm are key devices for next generation data center, LiDAR and sensing applications. Vector Photonics is developing surface emitting devices that can be used in both an array or as single emitters in application utilizing low index contrast semiconductor material. Key technology advances in these structures will be discussed in the context of simulation and coupling in both free space and to silicon photonics chip sets.

Silicon-organic hybrid electro-optic modulators for next generation optical interconnects

Presented by Adrian Mertens, CEO and Co-Founder, SilOrix

Combining silicon photonics and electro-optic polymers has led to a substantial improvement of silicon-based modulators, especially in terms of energy efficiency, device footprint and modulation speed. By utilizing solution processes like inkjet-printing or micro dispensing, those organic materials are intrinsically scalable and can be moreover processed completely back-end-of-line. In the last years a plethora of high-speed modulators with drive voltages below 1 V have been realized with this hybrid approach. Nevertheless, the long-term stability of the organic devices could not yet fully be demonstrated. With new material concepts, encapsulation methods and process flows, SilOriX is now paving the way to long-term stable and high-efficient electro-optic SOH-modulators.

Sputter deposited Al2O3: an ultra-low loss integrated photonic platform for broadband operation from the UV till the mid-IR

Presented by Sonia M. Garcia-Blanco, Professor at the University of Twente (Netherlands) and co-founder of ALUVIA Photonics, ALUVIA Photonics

Aluminium oxide is an excellent platform for the development of PICs that can operate from the UV (200 nm) till the near-IR (3 um). Doping the material with rare-earth ions allows for optical amplification at different wavelength ranges. In this presentation, we will give an overview of the performance of the technology as well as some examples of basic building blocks recently developed.

TFLN PIC Platform: Unleashing Monolithic power to Enhance Hybrid/Heterogeneous PICs

Presented by Hamed Sattari, Technology Manager, CSEM

Recent breakthroughs in thin-film lithium niobate (TFLN) PICs technology developments have generated remarkable results. However, the transition of these advancements to an industrial scale necessitates a dependable fabrication process. The Swiss Center for Electronics and Microtechnology (CSEM) is at the forefront of this endeavor, spearheading an open PIC foundry for TFLN. The focal point of our technological innovation lies in the seamless monolithic integration of passive and active components in this platform. By unleashing the monolithic power of the TFLN PIC platform, we aim to enhance hybrid and heterogeneous PICs, thereby contributing to the realization of advanced and scalable photonic technologies. Join us as we explore the potential and applications of this groundbreaking approach, paving the way for a new era in integrated photonics.

Unlocking the potential of hybrid/heterogeneous PIC design

Presented by Martin Fiers, Co-founder and product manager, Luceda Photonics

While substantial efforts are directed towards advancing hybrid and heterogeneous integration on the technology side (processing, packaging, etc.), it is important to develop a PIC design flow and the logistics to enable this flow. In this presentation we highlight the design challenges and opportunities, and what is needed to scale hybrid and heterogeneous integration to a higher Technology Readiness Level.

PIC Packaging: Securing Optimal Integration and Performance
Panel Session

Advancing the Frontier of Photonic Integration: Challenges and Innovations in PIC Packaging

Photonic Integrated Circuit (PIC) packaging is correctly redefined because of new challenges in miniaturization, efficiency and capacity demands driven by new trends, such as AI or quantum computing. This panel session aims to dissect the need for collaboration between equipment manufacturers, OSATs and their customers discussing the pivotal role of the photonic ecosystem in ensuring reliability, and optimal performance of PICs. The session will discuss the maturity, applicability and suitability for volume production of the latest advances in assembly and encapsulation techniques, efficient coupling strategies for light transmission, and the integration of PICs into diverse applications like communication networks and sensing systems.

Jose Pozo
Joost van Kerkhof
Michael Lebby
Lightwave Logic Inc
Peter O'Brien
Tyndall National Institute
Raju Kankipati
POET Technologies

AIM Photonics Foundry providing Co-Process and Co-Development to Address Challenges in Photonic Integrated Circuit (PIC) Packaging

Presented by David Harame, COO AIM Photonics and Associate Vice President for Process Development, EPDA, and Test Assembly and Packaging, AIM Photonics

Photonic integrated circuits (PICs) are fabricated in CMOS semiconductor fabrication facilities, which allows manufacturers to take advantage of the large installed base of tools and processes. However, traditional electronic packaging is not equipped to handle the inherent challenges associated with packaging advanced photonic devices into functional products. In this presentation we explore some of these challenges, such as sub-micron alignment tolerances, sensitivity to temperature variations, optical losses, and a lack of established standards, especially as they relate to the design and manufacture of optical coupling structures. At AIM Photonics, we have learned that the best results are obtained when the PIC manufacturing and packaging processes are co-designed to better achieve low-loss coupling, particularly between photonic integrated circuits and other elements in the system. This often requires structural and process changes in the bae PIC processes to achieve the best results. Our “end-to-end” approach to developing an integrated photonics manufacturing ecosystem—including electronic photonic design automation (EPDA), wafer manufacturing (including interposers and heterogeneous integration), and electronic-photonic test, assembly and packaging capabilities—enables us to develop reliable, accessible and affordable solutions that will ensure the manufacturing-readiness of this critical technology for decades to come.

Advances in PIC Manufacturing for Sensing and Datacom Applications – All Thanks to Nanoimprint Lithography

Presented by Jonas Khan, Team leader of the SmartNIL® Development Team - Process Technology Division, EV Group

Manufacturing novel optical sensors for data centers, telecom networks, high-speed computing for artificial intelligence, or LiDAR components for next-generation autonomous driving requires a reliable, robust, and flexible manufacturing technology. One key solution for efficient production of novel photonic devices is Nanoimprint Lithography. It enables the structuring of an entire wafer in a single process step. Moreover, SmartNIL® technology allows for aligned imprinting on functional surfaces as well as partial imprinting in combination with inkjet coating. The optical structures are fully functional directly after imprinting and can range from sub-μm up to several microns in height. We will present the entire process flow for wafer structing with the main characteristics of the technology, including recent applications.

Advancing Optical Testing for Photonic Integrated Circuits: From Prototype to Production Scale-Up

Presented by Ricardo Arias, Field Sales Application Engineer - Sales, Luna Innovations

Ensuring fast, accurate, and comprehensive testing of the optical properties of Photonic Integrated Circuits (PICs) is crucial for minimizing prototyping time and costs and accelerating product introduction to the market. Luna Innovations offers cutting-edge optical frequency domain reflectometry (OFDR) based test and measurement solutions that can characterize modern PIC-based devices with high speed and reliability. The OVA 5100 can provide precise measurements in reflection or transmission modes within seconds, capturing loss, polarization, dispersion, phase, and time domain response simultaneously. The new Lightwave Component Analyzer, LWA 7601-C, offers rapid testing capabilities with a 12.5 Hz acquisition speed. Luna's products can be seamlessly integrated into PIC manufacturing lines, allowing for full automation with alignment probe stations at wafer and chip levels. Join us to explore the solutions that meet your optical testing needs.

Aligned additive microfabrication for advanced optical packaging

Presented by Jochen Zimmer, Sales Manager, Nanoscribe

Two-photon polymerization can be used to directly print complex micro- and mesoscale 3D parts. These parts can be transparent and have optical-quality surfaces. They can be printed on pre-structured surfaces, such as fiber arrays and photonic chips, with automatic sub-micron alignment. Recently, we launched 3D printing by 2GL(R), a significant breakthrough that overcomes the quality-speed trade-off commonly experienced in 3D (micro-)printing. This process is commercially available as part of our microfabrication system Quantum X align. We will present the technology, and recent applications in the field of photonic integration.

As Photonics Applications Multiply, New Ways to Subtract Costs

Presented by Scott Jordan, Photonics Expert and Business Developer at PI, Physik Instrumente

For Silicon Photonics in 2024, macroeconomic headwinds and war jitters push back against tides of opportunity driven by rapid adoption of PIC technology in applications far afield from its launching pad of the data center: LIDAR for autonomous vehicles and new classes of weaponry, wearable technologies for health, VR headsets for entertainment and new professional applications, quantum computing and sensing… These are all examples where silicon photonics is an enabling technology, and more emerge every week. But as we have detailed in past AngelTech PIC gatherings, the mainstreaming of silicon photonics means production volumes must ramp by three orders of magnitude in the next few years. Our industry must confront how to scalably build and test the novel devices that will make all this possible. Multiple studies have spotlighted the alignment process as the largest cost contributor for photonic devices, and this has been addressed by novel microrobotic mechanisms now capable of performing multiple complex alignments in a single step, yielding typically 99% reduction of optimization times. Now, a further advancement addresses the one remaining alignment-related time sink: first-light acquisition. Especially in multichannel and I/O chip designs, achieving the first glimmer of throughput has remained a slow process. Device-to-device variability, fixturing indeterminacies and placement repeatabilities all drive this formerly-painful initial process. Now, a breakthrough intelligent algorithm, integrated into a newly broadened spectrum of microrobotic configurations, virtually eliminates the time required to achieve first-light. By further reducing costs and increasing the productivity of test and assembly automation, this new functionality is an enabler for production economics as silicon photonics scales.

Breaking the barriers for high frequency packaging

Presented by Guillermo Carpintero, Professor at UC3M Electronics Technology Department, LEAPWAVE TECHNOLOGIES

Photonics has spearheaded the access to very high frequencies, into the Terahertz range. However, current connector standards reach just up to 100 GHz and is extremely challenging to drive the signals from the devices to the edge of the package. We show a new approach introduced by LEAPWAVE TECHNOLOGIES, using dielectric waveguides.

Electrooptic Glass Substrates for Photonic Packaging

Presented by Andreas Matiss, Senior Manager Optical Components and Integration, Corning

Electrooptic glass substrates are a potential candidate to solve emerging challenges in advanced photonic packaging of silicon-photonics-based integrated circuits. Chiplet-based approaches to lower the total power consumption are discussed as well as optical fan-in and fan-out substrates to manage the increasing optical shoreline bandwidth density at the edge of the chip and the package. Our design enables low-cost assembly methods like pick-and-place alignment of optical components and provides fiber optics connectivity with low-profile mechanical transfer (MT) ferrule-based fiber connectors.

Impact of PIC device architecture and integration concept on packaging and assembly

Presented by Helen Waechter, Head of Development Team Optics, Helbling Technik Bern AG

When developing a device containing a photonic integrated circuit (PIC), the architecture of both the PIC and the overall system plays a crucial role in various aspects, such as PIC packaging design, assembly processes and required manufacturing tools. A key consideration is to determine which functionalities are best suited for integration on the PIC and which should remain external. This decision depends on technical feasibility, its impact on PIC integration and manufacturing considerations, as well as commercial viability. We will discuss these questions using a handheld optical coherence tomography (OCT) device as a case study.

Industry proven Photonic Wire Bonds and Facet-Attached Micro-Optical Elements: from Telecom/Datacom to Quantum Applications

Presented by Philipp-Immanuel Dietrich, Technology Fellow, Vanguard Automation

Industry proven Photonic Wire Bonds and Facet-Attached Micro-Optical Elements: from Telecom/Datacom to Quantum Applications” Abstract: Photonic wire bonds and facet-attached micro-lenses are 3D freeform structures that enable high design flexibility while maintaining losses below 2 dB, crucial for high-volume production of compact optical integration platforms in advanced photonics packaging.

Optimizing Cost and Scaling Efficiency in Swept Wavelength Testing for Alignment and Packaging of PIC

Presented by Matt Adams, Senior Product Manager, VIAVI Solutions

During the alignment, calibration, and validation of wavelength selective switches (WSS) based on LCOS or MEMS expanded beam optics, thousands of wavelengths resolved IL/RL/PDL are made in 500ms or less and at picometer or even sub- picometer resolutions per WSS. Scaling costs and volume has been critical to these technologies’ success and wide deployment. Much of what was learned can be directly mapped to PIC testing, however some updates are required to measure additional PIC specific parameters such as TE/TM performance. This session will provide insights into adapting and optimizing existing test processes for WSS to suit the specific requirements of testing PICs.

Technology Developments & Equipment Concepts for Scaling Up Photonics Production for Datacenters

Presented by Malte Ennen, Sales Manager Europe, ficonTEC

Photonics is a crucial part in the architecture of communication systems. The past was dominated by pluggable transceiver modules which convert the electrical signal of the datacenter racks into optical signals. For todays demands in terms of energy sustainability and the needed bandwidth it is necessary to bring the optical link as close as possible to the digital signal processing inside the rack minimizing the electrical path length. This presentation will give an insight into the architecture of a photonics based rack and the involved manufacturing steps to realize these devices. Concepts for wafer level testing, precise die bonding and fiber preparation will be presented.

Towards a Comprehensive, Multiphysics Design Solution for Co-packaged Optics

Presented by Ahsan Alam, Lead R&D Engineer, Ansys Optics

Modern-day applications like 5G, AI, ML, and HPC have dramatically increased the volume of traffic through datacenters. Conventional pluggable optics cannot keep up with the growing need for high bandwidth and low power density. Co-packaged optics (CPO) can provide the solution by bringing the optics closer to the electronics and by dramatically reducing the length of the electrical links. However, there are unique Multiphysics and multi-scale design challenges that need to be overcome. Firstly, there is the challenge of efficiently coupling the optical signal in and out of the photonic IC (PIC). The photonic coupler needs to be designed while accounting for the alignment and angle of the fiber. Designers also must ensure that the fiber alignment holds in the package via some passive or active alignment techniques. Next comes the thermal design challenge. By placing the PIC inside the electrical package, we increase the possibility of thermal crosstalk. While the thermal power from heaters and laser sources in the photonic die will affect the temperature map of the package, the heat generated in the electrical dies and the cooling mechanism of the overall system will affect the thermal behavior of the PIC. A complete thermal analysis from die to system level is therefore needed. Finally, the designer needs to perform a transient simulation of the entire system to ensure signal and power integrity. This will require self-consistent electrical and photonic circuit simulations while accounting for the additional parasitic effects coming from the different types of electrical interconnects introduced at the packaging stage. This presentation will show how we are utilizing the Multiphysics portfolio of Ansys to address these design challenges and establish a comprehensive design solution for CPO.

Rapid Scaling: Foundries Fuelling PICs' Mass Production

A view from the Foundry: Silicon Photonics

Presented by Anthony Yu, Vice President, Silicon Photonics Product Management, GlobalFoundries

GlobalFoundries Fotonix™ is a highly differentiated and feature rich silicon photonics foundry platform with the flexibility to support CWDM and dWDM solution. As markets such as Generative AI drive demand for high bandwidth and power efficiency, advanced node silicon photonics will drive innovation on micron-scale devices. System requirements play an outsized role in determining the specifications of the foundry features to be developed for the Fotonix™ roadmap.

Low Loss Photonic Integrated Circuits: From Prototype to Volume

Presented by Michael Geiselmann, CCO, LIGENTEC

In this talk, we present progress on scaling the fabrication of low loss photonics integrated circuits to volume. We will discuss application spaces ranging from sensing to optical computing, including quantum computing and telecommunication, where low loss PICs are crucial to enable a technology breakthrough. Options of active integration, such as LNOI are discussed to get high speed modulation on a low loss platform. We create the bridge from fast R&D cycles in low volume PIC fabrication through multi-project wafer runs to high volume PIC fabrication in an automotive qualified CMOS line.

Silicon photonics for AI/HPC Optical Interconnects

Presented by Philippe Absil, Vice President R&D, Department Head at imec, imec

The AI and machine learning applications roadmaps call for low power and high bandwidth interconnects surpassing the limitations of Cu wires for the ethernet networking, within the computing clusters and eventually within the servers. In this presentation we will review some of the trends and innovations needed for the silicon photonics technology platforms to enable the broad adoption of silicon photonics at the heart of the AI systems.

Accelerating PIC Adoption in Established Markets
This theme is sponsored by LioniX International

Design to Device: Accelerating PIC adoption by lowering entry barriers to turnkey photonic solutions

Presented by Amitesh Singh, Account Manager, LioniX

The photonics landscape is rapidly maturing where PIC-based market-ready devices are becoming mainstream. With design-to-device capabilities including design, fabrication, packaging, and electronics, LioniX International is a trusted partner for customers who wish to develop disruptive photonic solutions. In this talk, we showcase how our customer Chilas has utilized our TriPleX® SiN platform to commercialize lasers with cutting-edge specifications and robust performance. By offering the laser as a standard building block on our MPW 1550 nm, LioniX has been lowering entry barriers to turnkey photonic solutions. This MPW offering is often a natural stepping stone for new customers who wish to test our TriPleX® platform and mitigate risk allowing them to go into production with confidence.

Efficient Test of PICs for High-Performance Computing Applications

Presented by Daria Lavrova, Product planner for photonics, Keysight Technologies

Silicon photonics is key to enabling the revolution in high-performance computing. Advancing from copper to optics in data center racks comes with specific challenges and drives photonic integrated circuit (PIC) technology maturation more strongly than ever. How efficient and fast the path to finding the optimal PIC design depends on the capabilities of the test equipment. Do you find PIC design validation challenging? Would you like to accelerate the development cycle rate and be first to market? Join this discussion to learn how to reduce on-wafer test time and manage optical losses and polarization. The scope of this session includes DC optical, RF electro-optical, and on-wafer functional tests.

Is integrated optics a perfect fit for next generation of Access Networks?

Presented by Prof. Dr. Antonio Teixeira, Co-founder and CSTO, PICadvanced

The evolution of services (AXV-R, metaverse, etc.), topologies (e.g. antennas for 5 and 6G) and users (AI LLM, distributed compilation, distributed computing) considerably increases the requirements to which access networks are subject. The response to this potential demand is already being discussed, especially by increasing data rates (50G+, including 200G).The growing technological vectors - speed and complexity - lead to an increase in the gap that bulk optics must fill, especially if we move towards coherent solutions, which leads to the emergence of new solutions in the field of optoelectronic components.In this talk, we will show some of the efforts being made to fulfil the technological vectors mentioned above, showing that PICs are the pathway for access networks evolution.

Opportunities and Challenges for Optics in AI Factories

Presented by Yannick De Koninck, Senior Engineer: Mixed signal design, NVIDIA

As GPU clusters continue to scale up and out to meet demand, optics plays a unique, multi-faceted role in these future systems by enabling power and cost-efficient interconnects, bandwidth steering and compute functionality. This talk will review NVIDIA's efforts to realize these opportunities and work through challenges for our future systems.

Opportunities for Photonics in Datacenter and High-Performance Computing (HPC) Infrastructure

Presented by Remco Stoffer, R&D Senior Staff, Synopsys

The adoption of PICs in datacenter and HPC infrastructure is primarily driven by (i) accelerated growth in traffic from high-throughput applications like AI/ML (ii) flattening of networks to support high-speed, low-latency operations (iii) disaggregation of computational resources, and (iv) the promise of greener operations. Advances in electrical interconnects to address these concerns have arguably remained reactive and slow. Recently published electrical interconnect standards, namely, the Peripheral Component Interconnect Express (PCIe) Gen6 and Universal Chiplet Interconnect Express (UCIe) Gen1.1 make it more evident that their successful implementation requires photonics closer to the electronics. We cannot ignore challenges for PIC adoption which remain due to the technology gaps for viable on-chip laser sources, design tools gaps for enabling multi-die and 3DIC solutions, and packaging, reliability, and serviceability concerns for near- and co-packaged optics. This talk aims to take a balanced view of the challenges and opportunities for widespread adoption of PICs in datacenter and HPC infrastructure.

Opportunities for Silicon Photonics: Developments and Applications

Presented by James Falkiner, Technology Analyst, IDTechEx

In this presentation, IDTechEx (a market research and consulting firm) and Technology Analyst, James Falkiner present the latest developments in the Silicon Photonics space. The presentation covers a technology overview, applications for PICs in neuromorphic and quantum computing, industry trends and challenges, and key segmented market forecasts for the Silicon Photonics industry. The presentation also introduces the IDTechEx report on PICs, which provides a comprehensive analysis of the technology, market, and players in this field.

PIC Solutions for Established and Novel Optical Communication Applications

Presented by Mehrdad Ziari, Senior Vice President of the Optical Module Group, Infinera

PICs continue to scale in bandwidth and enable large scale deployment in a wide range of connectivity applications in optical networks and data-centers. We will review recent advances in InP PICs in scaling bandwidth, reach and power efficiency and share examples across various applications.

Presentation by Bright Photonics

Presented by Ronald Broeke, General Manager, Bright Photonics

Awaiting presentation abstract.

Revolutionizing Architecture and Components for New Generation Energy-Efficient High-Density Photonic Integrated Coherent Transceivers

Presented by Tomoyuki Akiyama, Senior Researcher, PETRA/Fujitsu

As the demands for scaling the capacity of both intra- and inter-data center networks continue to surge exponentially, we find ourselves confronted with a formidable barrier, and on the edge of a crucial moment that requires a drastic transformation in transceiver architecture. This presentation aims to introduce an innovative architecture tailored for the next generation of energy-efficient, high-density transceivers, leveraging our pioneering photonic integrated optical digital-to-analog converters and optical signal processors.

Scaling photonic integration and packaging of hybrid multi-chip assemblies using 3D lithography

Presented by Dr. Laura Horan, Product Management Leader, Vanguard Automation

Driven by mega trends such as the IoT and autonomous driving, PICs have been growing at a CAGR of greater 25%. Conventional packaging approaches are unlikely to keep up with short innovation cycles and future volume requirements. 3D laser lithography based Photonic Wire Bonding allows for compact chip-to-chip packaging with high yields, complying with tight optical specification and environmental requirements. Micro-optical lenses can be directly fabricated on wafer-level, allowing for passive alignment of PICs with low coupling losses, while also meeting industrial reliability specifications. See how these technologies have been implemented in a reconfigurable tool chain which scales from prototyping to high-volume production.

Semiconductorization of Photonics using Silicon Optical Interposer

Presented by Raju Kankipati, SVP/GM POET USA, POET Technologies

The use of silicon optical interposer as an integration platform enables wafer scale assembly and testing, passive attachment of lasers and other key components, and monolithic integration of elements like MUX, DMUX, and splitters/combiners. The close integration of the electronic and photonic components on a low-loss platform like the Silicon optical interposer improves RF performance, reduces power consumption, and lowers overall assembly cost. Implementation of TSVs on the Optical Interposer Engines eliminates wire bonds and brings true semiconductorization of Photonics to a reality and offers a scalable and cost-efficient solution for large-scale data centers and AI deployments.

Silicon Photonics Market and Applications: from Optical Transceivers to Emerging Uses

Presented by Eric Mounier, Chief Analyst, Photonics & Sensing, Yole Group

Since its inception in the 80s, silicon photonics has evolved significantly, transitioning from the development of high-confinement waveguides to a technology that integrates materials, processes, and packaging techniques from the CMOS industry. This evolution has solidified its dominance in the transceiver market. Despite this success, silicon photonics remains a technology in active development, with numerous potential applications on the horizon, promising abundant opportunities for expansion. The demand for faster data processing in areas like artificial intelligence (AI) and machine learning (ML) is expected to drive the adoption of silicon photonics in the coming years. With conventional computing architectures reaching their physical limits, there is a growing need for faster data transmission. Silicon photonics, with its ability to facilitate high-speed communication, is poised to meet this demand. Beyond data centers and telecommunications, silicon photonics holds promise in areas such as optical LiDAR systems, quantum computing, optical computing, and medical applications. However, challenges such as cost, standardization, and regulatory hurdles need to be addressed for widespread adoption in these sectors. The silicon photonics market is expected to experience rapid growth, driven by the demand for high-data-rate pluggable modules and the scaling of ML models using optical I/O in ML servers. By 2028, the market is forecasted to exceed $600M, representing a Compound Annual Growth Rate (CAGR) of 44% from 2022. This growth trajectory underscores the increasing importance and versatility of silicon photonics in meeting the demands of modern computing and communication systems, but also in sensing applications. The presentation will cover market forecasts for communication, computing, and sensing applications, along with insights into the industrial landscape and the latest technological trends in Silicon Photonics.

Transforming point-of-care diagnostics: The power of silicon plasmonic biosensors in the battle against acute infections

Presented by Dimitris Tsiokos, Founder and CEO, bialoom

We will present Bialoom’s unique silicon plasmonic biosensing technology and how this is used for next generation blood diagnostics in point of care settings. The talk will give an overview of monolithic co-integration of CMOS-compatible Mach Zehnder interferometers with plasmonic transducers and how those are transformed into robust, and configurable biosensor PICs. We will review the capabilities of this technology and we will present the progress towards the development of a powerful plasmo-photonic diagnostic biochip for faster diagnosis and therapy of acute infections.

PIC Size and Simulation: Enhancing Design Efficiency

A perspective on recent trends in inverse design of integrated photonic devices and circuits

Presented by Wolfger Peelaers, Senior research scientist, Hewlett Packard Enterprise

Over the past decade, more automation has trickled into the workflow of designers of photonic devices. Specifically, inverse design techniques based on the adjoint method have allowed designers to find low-loss passive integrated devices based on local search techniques. Lately, to avoid the limitations of inherently local search techniques, which might get stuck in local minima if sub-optimal initial conditions are provided, the field has explored global optimization techniques, inspired by recent progress in physics-informed neural networks and related trends in the machine learning community. In this talk, we will contrast and compare the latest progress in both local and global inverse design techniques, with a particular focus on their performance for integrated photonic devices and circuits, as well as ease-of-use.

Efficient design techniques for custom PDKs protecting your IP

Presented by Andrzej Połatynski, Principal Application Engineer and Solution Owner of the PDK framework, VPIphotonics

In this talk, we present the integration of foundry-specific photonic Process Design Kits (PDKs) with advanced simulation modules, highlighting their role in streamlining Photonic Integrated Circuit (PIC) design. Our focus is on a custom PDK framework that provides flexible PDK libraries and enables the protection of the users' and foundries' IP. We demonstrate how advanced simulation modules enable flexibility and acceleration of the design workflow. Additionally, we'll explore powerful visualization methods helping to control the simulation and visualization of the results.

Power Efficiency: Minimizing Consumption in PICs

The evolving role of optics in AI Clusters

Presented by Vlad Kozlov, CEO, LightCounting

This presentation will discuss the evolving role of optics in AI Clusters, covering both connectivity and switching. It will feature data for the sales of optical transceivers, AOCs and DACs for compute nodes and AI Clusters in Cloud datacenters for 2021-2023 with a forecast for 2024-2029. Use of optical connectivity for NVlink and CXL/PCIe in the implementation of AI Cluster architectures will also be discussed.